Recently, as the integration and functionality of semiconductor integrated circuits have been increasing, there has been a demand for development of micro-fabrication techniques for miniaturization and densification. Planarization techniques for interlayer insulating films and embedded wirings are important in semiconductor device fabrication processes, in particular, in the process of forming multilayered wirings. That is, as the multilayered wirings are increasingly formed due to the miniaturization and densification in the semiconductor fabrication processes, the degree of irregularity tends to increase in the surfaces of the individual layers, resulting in a situation where the difference in level exceeds the depth of focus in lithography. In order to avoid such a problem, high planarization techniques are important in the process of forming multilayered wirings.
As the material for such wirings, Cu has been receiving attention because of its lower resistivity compared with conventionally used Al alloys and also because of its excellence in electromigration resistance. Since the vapor pressure of copper chloride gas is low, it is difficult to form Cu into the shape of wirings by Reactive Ion Etching (RIE) which has been conventionally used. Therefore, in order to form the wirings, a Damascene method is used. In this process, gap fillings such as trench patterns and via holes, are formed in an insulating film. A barrier film is then formed thereon, and then Cu is deposited so as to be embedded in the trench portions to form a film by sputtering, plating, or the like. Subsequently, the excess Cu and the barrier film are removed by Chemical Mechanical Polishing (hereinafter referred to as “CMP”) until the surface of the insulating film is exposed, other than the portions corresponding to the recesses, whereby the surface is planarized. Recently, a Dual Damascene method has been predominantly used, in which Cu wirings embedded with Cu and via holes are simultaneously formed.
In the formation of Cu interconnect, in order to prevent Cu from diffusing into the insulating film, a barrier film composed of Ta, a tantalum alloy, or a tantalum compound such as tantalum nitride, is formed. Therefore, in the portions other than those corresponding to Cu-embedded wirings, the exposed barrier film must be removed by CMP. However, since the barrier film is significantly harder than Cu, it is often not possible to achieve a sufficient removal rate. Accordingly, a two-stage polishing method has been proposed, which includes a first polishing step of removing the wiring metal film and a second polishing step of removing the barrier film, as shown in FIG. 1.
FIG. 1 includes cross-sectional views which show a method for forming embedded wirings by CMP. FIG. 1(a) shows the state before polishing; FIG. 1(b) shows the state after the first polishing step in which a wiring metal film 4 is removed; and FIG. 1(c) shows the state after the second polishing step in which a barrier film 3 is removed. As shown in FIG. 1(a), an insulating film 2 provided with trenches for forming embedded wirings 5 is formed on a Si substrate 1. The barrier film 3 is formed on the insulating film 2, and the wiring metal film (Cu film) 4 is formed further thereon. The wiring metal film 4 is removed in the first polishing step, and the barrier film 3 is removed in the second polishing step.
However, in CMP using the conventional polishing compound, an increase in dishing and erosion in the Cu-embedded wirings 5 will give rise to problems. Here, dishing is likely to occur in a wide wiring portion, and signifies a state in which the wiring metal film 4 in the wiring portion is over-polished so that the central part thereof is concaved as shown in FIG. 2. Erosion is likely to occur in a dense wiring portion, and signifies such a phenomenon that the insulating film 2 in the dense wiring portion is over-polished and the insulating film 2 becomes thin as shown in FIG. 3. In FIGS. 2 and 3, the barrier film 3 is not shown.
When the conventional polishing compound is used, the removal rate in the barrier film 3 is significantly smaller than the removal rate in the wiring metal film 4, so that Cu in the wiring portions are over-polished while the barrier film 3 is removed, resulting in a large extent of dishing. Furthermore, the polishing pressure applied to the barrier film 3 and the insulating film 2 therebeneath in a highly dense wiring portion becomes relatively greater than that applied to a less dense wiring portion, so that the removal rate in the second polishing step largely differs depending on the wiring density, and the insulating film 2 in the highly dense wiring portion is over-polished, resulting in a large extent of erosion. When such dishing or erosion occurs, the wiring resistance tends to increase and electromigration tends to easily occur, resulting in the reduction of the reliability of devices.
Ta and tantalum compounds used for the barrier film are difficult to etch chemically. Because of their higher hardness than Cu, Ta and tantalum compounds are difficult to remove mechanically by polishing. If abrasive grains with a higher hardness are used in order to increase the removal rate, scratches will occur in the soft Cu wirings, resulting in problems such as electrical defects. If the concentration of abrasive grains is increased, the removal rate of the insulating film is also increased, so that erosion takes place to a large extent. Furthermore, it becomes difficult to maintain the dispersion of the abrasive grains in the polishing compound, so that problems are caused in the dispersion stability, such as sedimentation and gelation with time.
In CMP, it is necessary to prevent Cu from being eroded by the polishing compound. Benzotriazole (hereinafter referred to as BTA) and its derivatives are known as most effective and widely used corrosion inhibitors for Cu and copper alloys (Takenori Notoya, Mechanism of Corrosion Inhibition of Benzotriazole-based Inhibitor, Japan Association of Corrosion control, 1986, p. 1). BTA forms dense films on the surfaces of Cu and Cu alloys and inhibits oxidation-reduction reactions, and thus etching is prevented. Therefore, BTA is an effective additive used for the polishing compound in order to prevent dishing in Cu wiring portions.
For example, JP-A-8-83780 discloses a method in which, by containing BTA or its derivative in a polishing compound, a protective film is formed on the surface of Cu, whereby dishing is prevented. However, in this method, it is not easy to add a sufficient amount of BTA that has a low solubility in water (solubility 1.98 wt % at 25° C.) to the polishing compound. If the amount of BTA added is increased, the dispersion balance of the polishing compound, which is a dispersion of abrasive grains, is disturbed, and sedimentation of the abrasive grains tends to occur with time, giving rise to problems such as low storage stability.
JP-A-10-74764 discloses a method of using an oxidizing acidic slurry, which contains colloidal alumina as abrasive grains, as a polishing compound for planarizing a metal film. This method is effective for polishing a barrier film which is composed of Nb. However, in the formation of Cu wirings, using Ta or its alloy for the barrier film, the removal rate and the surface smoothness of the obtained wirings are not sufficient.
Furthermore, JP-A-11-21546 discloses a polishing compound including a slurry containing abrasive grains composed of a metal oxide selected from cerium oxide, alumina, silica, titania, zirconia, and the like; urea; and hydrogen peroxide. However, in this polishing compound, the removal rate of the barrier film is extremely low relative to the removal rate of the Cu wirings, so that for example, such problems that dishing is apt to occur and the stability of the slurry is poor.